AsmJit: Lightweight C++ library for low-latency machine code generation
asmjit.com·13h·
Discuss: Hacker News
🦀Rust Macros
High-order adaptive multi-domain time integration scheme for microscale lithium-ion batteries simulations
arxiv.org·9h
⚙️Tape Engineering
I've Seen Things, pt II
windowsir.blogspot.com·1h·
Discuss: www.blogger.com
🔓Hacking
Threaded Code
muforth.dev·3h·
Discuss: Hacker News
🦀Rust Macros
Compulab MCM-iMX95 – A solder-down NXP i.MX 95 SoM
cnx-software.com·9h
🔌Single Board PC
PicoEMP: low-cost Electromagnetic Fault Injection (EMFI) tool
github.com·10h·
Discuss: Hacker News
⚡Circuit Archaeology
Paragon mechanical timer 4004-71M vs 4004-71
blogger.com·8h
🎯Emulation Accuracy
Building a Go Concurrency Task Scheduler: Efficient Task Processing Unleashed
dev.to·13h·
Discuss: DEV
🌊Stream Processing
ICSA Colloquium Talk - 10/07/2025
informatics.ed.ac.uk·3h
🧲RISC-V Archaeology
Running shadow system tests in RISC-V
ikerexxe.github.io·6h
👑RISC-V Privilege
Fixes for five Lix CVEs
lix.systems·22h·
Discuss: Lobsters
❄️Nix Adoption
Intel lays off hundreds of engineers in California, including chip design engineers and architects — automotive chip division also gets the axe
tomshardware.com·1h
🔩Systems Programming
Pong in Discrete Components
hackaday.com·17h
🎮GameBoy Architecture
How to Compile a Large Language Model (LLM) to RISC-V
siliscale.com·3d·
Discuss: Hacker News
🧩RISC-V Assembly
Why Binary Won and Nothing Else Even Got Close
b0a04gl.site·18h·
Discuss: Hacker News
🧲RISC-V Archaeology
5 huge stumbling blocks to legacy mainframe EOL
techradar.com·7h
🏛️Mainframe Archaeology
Teaching an Emulator How to Talk
mrcat.au·1d·
Discuss: Hacker News
🎯Emulator Accuracy
Microcontrollers: Getting Started
youtube.com·4d
🔌Microcontrollers
Meet Mojo: The Language That Could Replace Python, C++, and CUDA
hackernoon.com·6h
⬆️Lambda Lifting
Shane Kennedy - Software Engineer
shaneikennedy.xyz·1d
🦀Rust Macros